Conference proceedings article
Analysis of Logic Controllers by Transformation of SFC into Timed Automata



Publication Details
Authors:
Stursberg, O.; Lohmann, S.
Editor:
IEEE
Publication year:
2005
Pages range:
7720-7725
Book title:
Decision and Control, 2005 and 2005 European Control Conference. CDC-ECC '05. 44th IEEE Conference on
ISBN:
0-7803-9567-0

Abstract
This paper proposes an approach to connect Sequential Function Charts (SFC), an industrially recognized and used description of logic controllers, to algorithmic verification. Based on a rigorous syntactical and semantical definition of SFC, the paper describes a formal scheme to generate a corresponding model represented by synchronized Timed Automata (TA). The latter model can be composed with a plant model specified as timed or hybrid automata. In order to verify safety properties for the controlled system, existing algorithms for model checking can eventually be applied to the composition.


Authors/Editors

Last updated on 2019-25-07 at 17:38